Dynamic Random Access Memory (DRAM) is where a transistor and a capacitor, kind of like a battery, that are paired together to create a memory cell which reperesents a single bit of data. A bit is a binary digit taking a value of 0 or 1. The capacitor holds the bit information (a 0 or a 1) and the transistor acts as a switch that lets the control circuitry to read or change the state of the capacitor. Imagine the capacitor as like a leaky bucket. So inorder to store a 1 in the memory cell, the bucket has to full. But remember that the bucket aka the capacitor is a leaky bucket so as soon as you fill it with 1, it empties out to 0. So in order for the DRAM to work, the CPU has to comealong and recharge all the 1 before it discharges.
Delay line memory works like a ripples in a pond. The delay line memory, the information is introduced to the memory in the form of electric pulses, like the ripples in a pond. These electric pulses go through a medium that transforms the pulses into mechanical waves while going through the medium. But after it comes out of the medium it goes back to being an electric pulses.